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10 transimpedance amplifier manufacturers in the world

Key word：

transimpedance amplifier

Release time：2024-01-10 16:13 reading：1254 Continue reading>>

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What is the function of transimpedance amplifier?

Key word：

transimpedance amplifier

Release time：2024-01-08 14:32 reading：1407 Continue reading>>

Renesas on Panthronics Acquisition and Synopsys’ Cloud <span style='color:red'>EDA</span> and Multi-die Focus at SNUG 2023

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Renesas on Panthronics Acquisition and Synopsys’ Cloud EDA and Multi-die Focus at SNUG 2023

　　In this episode of Embedded Edge with Nitin, Sailesh Chittipeddi from Renesas Electronics discusses the Panthronics acquisition and its relevance to the company’s connectivity strategy, as well as insights from Synopsys executives at the SNUG 2023 event on cloud EDA, silicon lifecycle management, multi-die, and AI-driven EDA.　　Welcome to this edition of Embedded Edge with Nitin. In this episode, I’m going to talk to Sailesh Chittipeddi of Renesas Electronics, and he’ll be talking about the reasons for the acquisition of Panthronics, the developer of NFC technology, which they just acquired, and how this fits in with the company’s acquisition strategy – a lot of which is around opportunities to attach to the embedded processor. And it’s part of the whole connectivity story that they’re pursuing at Renaissance. He also talks about why AI is going to be transforming the industry all the way from the edge to infrastructure, and he talks about its profound impact on everything, including areas like memory bandwidth, power efficiency and digital power.　　Following that interview, I’ll talk to two executives from Synopsys. I attended the Synopsys User Group event in Santa Clara in California, and I managed to speak to various people, including Aart de Geus and Sassine Ghazi. But in this podcast, you’ll also hear from Shankar Krishnamoorthy, he’ll talk about cloud adoption, silicon lifecycle management and multi-die. And if you remember, Synopsys launched their cloud-based EDA as a service product last year. So I asked him a little bit about the adoption there. And then there was a lot of talk around silicon life cycle management at the event and also a big focus on multi-die, especially with a nice keynote from Francois Piednoel of Mercedes-Benz, talking about why they’ve adopted multi-die in their quest to go to Level 4 autonomy in Mercedes-Benz. That was probably one of the the really fascinating keynotes at the at the Synopsys User Group event, or SNUG 2023 as they call it.　　And then I speak to Stelios Diamantidis, and he’s one of two of the engineering team who in 2017 went to management and said, look, we think there’s a serious use for AI in EDA. That’s a really interesting conversation. He tells us how about how and why they thought about doing that and where they’re going next with AI-driven EDA.　　In this episode of Embedded Edge with Nitin, Sailesh Chittipeddi from Renesas Electronics discusses the Panthronics acquisition and its relevance to the company’s connectivity strategy, as well as insights from Synopsys executives at the SNUG 2023 event on cloud EDA, silicon lifecycle management, multi-die, and AI-driven EDA.　　Welcome to this edition of Embedded Edge with Nitin. In this episode, I’m going to talk to Sailesh Chittipeddi of Renesas Electronics, and he’ll be talking about the reasons for the acquisition of Panthronics, the developer of NFC technology, which they just acquired, and how this fits in with the company’s acquisition strategy – a lot of which is around opportunities to attach to the embedded processor. And it’s part of the whole connectivity story that they’re pursuing at Renaissance. He also talks about why AI is going to be transforming the industry all the way from the edge to infrastructure, and he talks about its profound impact on everything, including areas like memory bandwidth, power efficiency and digital power.　　Following that interview, I’ll talk to two executives from Synopsys. I attended the Synopsys User Group event in Santa Clara in California, and I managed to speak to various people, including Aart de Geus and Sassine Ghazi. But in this podcast, you’ll also hear from Shankar Krishnamoorthy, he’ll talk about cloud adoption, silicon lifecycle management and multi-die. And if you remember, Synopsys launched their cloud-based EDA as a service product last year. So I asked him a little bit about the adoption there. And then there was a lot of talk around silicon life cycle management at the event and also a big focus on multi-die, especially with a nice keynote from Francois Piednoel of Mercedes-Benz, talking about why they’ve adopted multi-die in their quest to go to Level 4 autonomy in Mercedes-Benz. That was probably one of the the really fascinating keynotes at the at the Synopsys User Group event, or SNUG 2023 as they call it.　　And then I speak to Stelios Diamantidis, and he’s one of two of the engineering team who in 2017 went to management and said, look, we think there’s a serious use for AI in EDA. That’s a really interesting conversation. He tells us how about how and why they thought about doing that and where they’re going next with AI-driven EDA.

Key word：

Renesas

Release time：2023-04-24 11:21 reading：3035 Continue reading>>

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Ameya360:Insights on Innolux-Vedanta LCD Tech Transfer

　　On February 14, 2023, Innolux made a public disclosure that it has reached an agreement to transfer TFT LCD panel and module technology to India’s Vedanta. The disclosure includes few details, but assumptions include:　　• The factory will be India’s first integrated flat panel display factory including both TFT, color filter, and cell frontplane processes as well as module assembly.　　• Although unconfirmed at this point, Vedanta had previously also planned to build its own by-plant glass melting and finishing facility factory with support from its glass-producing subsidiary AvanStrate.　　• The fab will be similar to Innolux’s Fab 8B and is likely to adopt Gen 8.6 or 2250 x 2600 mm substrates. A capacity of 60,000 substrates per month is currently assumed.　　• Vedanta engineers are already involved in on-site training in Taiwan.　　• Innolux presumably will receive a one-time technical transfer payment and then collect ongoing royalty payments per display when mass production begins.　　• Vedanta has ambitious plans. Assuming success with this first factory, it has long-term hopes of expanding production to other regions in India and growing into the role of a leading, global FPD producer.　　The technology transfer is a key milestone for Vedanta, which will facilitate not only a rapid transfer of critical manufacturing technology, but also government approval, financing, supplier support, and improved outcomes for what will undoubtedly be a very big challenge to launch a domestic FPD industry in India.　　The timeline is likely to change as the plan develops, but Omdia’s current expectations are shown in the figure below.　　Bharuch, in the state of Gujarat, has been proposed as a likely factory location. The ancient city is highly industrialized and is home to many chemical and other manufacturing facilities. Bharuch is a port city with a large liquid cargo terminal that makes importing equipment and materials and exporting finished products convenient.　　Manufacturing FPDs in India is appealing for the large available market, which is expected to grow rapidly on the expansion of the middle class and a lower FPD saturation rate than developed regions. Also, it is not just India; surrounding Southern Asian countries are potential markets for made-in-India consumer electronics.　　Since 2014, the government has promoted a “Make in India” policy that targets increasing growth in the manufacturing sector, creating more manufacturing jobs, and growing the manufacturing sector’s contribution to GDP. In parallel, many state governments also launched related local programs. Governmental assistance for the project, including significant central and local government incentives and financial support, is both driving the investment and important in helping to coordinate the complicated effort.　　India is promoting itself as a manufacturing alternative to China and has particular appeal in an era where geopolitical concerns and trade frictions are strongly encouraging sourcing diversification for multinational IT firms.　　For Innolux the agreement is positive news in a very difficult market environment. The company, like the rest of the display industry, continues to struggle to work through severe over-capacity, low prices, and financial losses. The initial technical transfer should include a significant cash payment. This can be used to mitigate current losses and give Innolux some flexibility to consolidate its business while shifting its focus to higher value-added products. Vedanta is not likely to become a direct competitor, rather its long-term success is upside potential in creating a future royalty-based revenue stream for Innolux.　　The technology transfer agreement is a major milestone for Vedanta, but it’s far from the final step. Planning the factory, getting government approval, financing, supplier support, building and ramping up the facilities, as well as many other stages along the way need to be successfully worked through before any panels are actually produced in India. But now, with Innolux’s backing, Vedanta is in the best position it has ever been, in realizing its very long-held dream of becoming India’s first FPD producer and leading the development of a domestic display industry.

Key word：

LCD,Innolux

Release time：2023-02-16 15:50 reading：3026 Continue reading>>

<span style='color:red'>EDA</span> Tools for Analog: Where Do I Go From Here?

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EDA Tools for Analog: Where Do I Go From Here?

　　Just as analog IC design is evolving, so, too, are electronic design automation (EDA) tools as they evolve to keep up with the demanding verification needs of next-generation chips. However, while analog, mixed-signal, and RF design tools have continued to grow rapidly and have hit double-digit annual growth rates in recent years, they have not exploded in scope to parallel the range of tools for digital design.　　“The key enabler of digital design automation has been the ability to use abstracted representations of standardized electronic components to synthesize and simulate designs,” said Laurie Balch, research director at Pedestal Research. “This is a well-established practice for digital design, but far more difficult for analog.” That’s because, by definition, analog operations cannot be represented as just zeros and ones, which permits greater design flexibility but also means greater analysis intricacy.　　Therefore, the EDA industry has not yet successfully developed adequate ways to achieve higher levels of abstraction for analog design techniques. “On top of these technical challenges, there remains both a real and perceived mystique surrounding the artistic element of analog design expertise,” Balch said. She added that analog engineers maintain specialized skills and knowledge to build custom circuitry with minimal standardized components.　　As a result, automating all the specialized experience, analysis requirements, and tricks and rules of thumb for making design tradeoffs is neither technically straightforward nor readily welcomed by the design community. Moreover, adopting new analog automation tools, even if they can be optimized for excellent performance, will require engineers to shift their mindset and trust tools that promise to offload more of the manual design tweaking and optimization they’re accustomed to conducting themselves.　　However, Sathish Balasubramanian, head of product, marketing and business development for the AMS division of Siemens EDA, sees some recognition of the advantages of a top-down digital methodology. “There is a paradigm shift underway to adopt digital verification techniques for the functional verification of analog and mixed-signal designs.”　　Balch also sees some degree of catching up with digital tools in the future. “We fully expect that eventually analog design tools will further mimic the landscape for digital design tools,” she added. “With the ever-increasing analog content embedded in the modern electronic devices, it’s simply not feasible for analog engineers to continue doing so much manual design work.”　　A modest progress　　Despite the challenges outlined above, there are signs of progress. Take the case of analog simulators, which must constantly enhance their model parsers to support the latest and greatest process nodes. “This is critical because analog simulators are used to characterize standard cell libraries, which will become foundational digital building blocks for new chips,” Balasubramanian said.　　He added that the matrix solver is the dominant component of the analog simulator, especially for large circuits, and it’s invoked repeatedly during the simulation. “New algorithms are being incorporated to improve matrix solving, as well as for parallelization, which can reduce the runtimes in circuit simulators.”　　Analog chip developers—users of these tools—are also expressing a sense of optimism. “Offering lab-quality results for virtual analog designs through EDA tools can mean vast computing power and simulation times,” said Henri Sino, product director of customer tools experience at Analog Devices. “To address this challenge, Analog Devices is prioritizing digitization of go-to-market engineering deliverables, such as datasheets to leverage and scale our EDA roadmap.” He added that Analog Devices is leveraging web-based tools, interactive content, and complete system designs as starting points.　　Will machine learning matter?　　When it comes to key challenges and potential solutions, Balch pointed to another vital premise. In the digital design world, increasing design size and complexity using advanced process nodes and materials necessitates more design automation. However, there aren’t enough analog design experts available, and design timelines are too tight for the traditional approaches to continue being sustainable.　　“It’s entirely possible that machine-learning algorithms may be a key to jumpstarting new automation options for analog design methodologies,” Balch said.　　Balasubramanian shared a similar view regarding machine learning’s potential in analog EDA tools.　　“Analog design is no longer restricted to block-level designs like op amps, data converters, and filters,” he said. “So it’s now finding wider applications in artificial intelligence, as analog is a closer representation of how the brain operates.” Balasubramanian pointed out that analog simulation produces a huge amount of measurement data. Here, advancements in machine learning can turn mountains of this raw data into valuable design insight that can improve a designer’s productivity.　　Not only design data but data associated with the variability of physical attributes can be utilized by machine learning to build variability models. When used for design variability analysis, it can result in 1,000× fewer simulation runs than what is needed by brute-force methods.　　Analog at the heart of the SoC　　Although digital circuits are largely responsible for everyday computing and are at the heart of modern chips, analog circuits are still integral to the successful operation of systems-on-chip (SoCs). Take the clock, for instance, the heartbeat of the SoC, sourced from a phase-locked loop, which is primarily an analog and mixed-signal design.　　Balch summed up the progress by noting that recent developments in analog EDA have largely revolved around better modeling and analysis of the parasitic effects of analog circuitry. Siemens EDA’s mPower tools are a good example in this regard. “Analysis tools and design optimization are certainly critical elements to ensure analog design success, but they’re only part of the long-term vision for analog design automation.”　　Balch recounted that it was the late 1990s and early 2000s when we last saw an earnest attempt to introduce analog synthesis and abstraction techniques. But these efforts were ultimately unsuccessful. It’s quite possible that the time is now to reinvigorate such approaches using the latest machine-learning techniques. “But it’s a near certainty that analog design methodologies won’t catch up with digital methodologies anytime soon,” she concluded.

Key word：

EDA

Release time：2023-02-06 15:10 reading：1574 Continue reading>>

Siemens and Synopsys settle Mentor Graphics patent litigation and team up to expand and extend <span style='color:red'>EDA</span> collaboration

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Siemens and Synopsys settle Mentor Graphics patent litigation and team up to expand and extend EDA collaboration

Siemens PLM Software and Synopsys have agreed to work together, settling their five-years of patent quarrels between Synopsys and Mentor Graphics.The settlement includes mutual seven-year patent cross-licenses between Synopsys and Siemens, and between Synopsys and Mentor Graphics.The partnership will see the two collaborate on electronic design automation (EDA) product interoperability projects for the benefit of their mutual customers, spanning a number of EDA domains from design to verification.“With the increasing complexity in electronics driven by AI, automotive, industrial and other high-impact markets, semiconductor and systems companies are grappling with design challenges from the roots of silicon all the way up to the application software,” said Aart de Geus, chairman and co-CEO of Synopsys. “We look forward to working with Siemens to provide increasingly powerful EDA and related solutions to our mutual customers.”“Our customers are rapidly adopting electronic design automation as part of their digitalisation strategy. Interoperability is a critical aspect of enabling customers not only in EDA but in the broader context of system development,” stated Tony Hemmelgarn, CEO of Siemens PLM Software. “Siemens is very committed to EDA and we are looking forward to our interoperability partnership with Synopsys.”

Key word：

Siemens,Synopsys

Release time：2018-07-10 00:00 reading：2129 Continue reading>>

SEMI to Absorb <span style='color:red'>EDA</span> Trade Group

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SEMI to Absorb EDA Trade Group

　　The Electronic System Design Alliance — formerly known as the EDA Consortium — will become part of the SEMI trade group, a development that underscores the blurring of lines within the semiconductor ecosystem from design through manufacturing.　　Under the terms of a deal announced by the two organizations on Monday (April 16), the ESD Alliance will integrate into SEMI as a strategic association partner later this year. All ESD Alliance members will become members of SEMI, increasing the reach of the SEMI trade group and facilitating opportunities for collaboration between EDA firms and those involved in semiconductor equipment and materials, as well as other areas of the electronics design and manufacturing chain.　　"Design and manufacturing are becoming more and more intertwined," said Bob Smith, executive director of the ESD Alliance, in an interview with EE Times. "The old days of designing a chip and 'throwing it over the wall' to someone to make it happen are pretty gone."　　SEMI, the trade group that has represented North American semiconductor equipment and materials suppliers since 1970, has, in recent years, sought to broaden its focus to encompass the entire electronic product design and manufacturing chain. Integrating the ESD Alliance membership will enable the group to further expand its reach into semiconductor and systems design.　　"For us, this is a very natural fit," said Bettina Weiss, vice president of business development and product development at SEMI. "The synergies between our two groups have become increasingly obvious."　　Both organizations' boards of directors approved the integration unanimously, added Weiss. Integration is expected to be completed during 2018.　　The ESD Alliance will retain its name and branding under the SEMI umbrella. The ESD Alliance board of directors will continue to set the organization's direction and will function as an executive advisory council of SEMI, said the organizations.　　By becoming part of SEMI, ESD Alliance members will gain access to SEMI's member resources and platforms, including SEMI's technology communities and activities in areas such as advocacy, international standards, health and safety, and trade and regulatory initiatives, said Smith.

Key word：

SEMI , EDA

Release time：2018-04-17 00:00 reading：1182 Continue reading>>

Female Founder Puts <span style='color:red'>EDA</span> in the Cloud

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Female Founder Puts EDA in the Cloud

　　A problem designing a demo board for a trade show led Natasha Baker to a career as an entrepreneur. Her story shines a light on the status of online design tools and provides a role model for women in tech.　　As an employee of National Instruments, Baker was using a reference design to build an accelerator board linked to a steering wheel and a Nintendo emulator. A datasheet called for design symbols and footprints that she couldn’t find in her software tool. In her frustration, she saw the need for an online source of electronic design content, and the idea for SnapEDA was born.　　At 25, Baker lacked the money as well as the programming and business skills to start an online software company. But she had plenty of drive.　　“I tried to learn to code, but couldn’t find enough time with my full-time job at NI, so I quit and started learning how to program with online tutorials,” recalled Baker. “I’m an EE in analog electronics from the University of Toronto — that’s why I didn’t know how to code that well.”　　The self-education worked. Her initial code base became the starting point for SnapEDA, which now serves more than 80,000 users in nearly 200 countries. She was the startup’s first customer and investor, bootstrapping her efforts for four years with contract work writing technical columns for Reuters and Forbes and programming for other websites.　　In 2015, SnapEDA was admitted into the Y Combinator startup program. She moved to a house in Silicon Valley, where she lived and worked with her first few employees.　　“We funded her because she had all the founder skills we look for,” said Dalton Caldwell, a partner at the Silicon Valley incubator that helped launch AirBnB and DropBox, among others.　　“Her technical background was impressive and, having worked as a journalist, she was an effective communicator and had good industry connections — and she had a prototype built with real users.”　　Later, the fledgling company became one of the first to get funding from Angels By The Sea in nearby Santa Cruz.　　“I was president of the group at the time and didn’t do much work as a class manager for startups, but for Natasha, I was willing because the company was in my field of electronics and I wanted to mentor a woman,” said Judy Owen, an EE who co-founded the investment group after a career working at Intel, SGI, and Chips and Technologies.　　“Natasha’s a bright and wonderful person, very motivated, and she responds quickly to inputs.”　　Through the Angels group, EDA veterans Chris Rowen and Jim Hogan became SnapEDA investors.　　“I found her story compelling and invested, and after a short time, I upped my investment significantly — I’ve doubled down on every contact with Natasha because she continues to impress me with her ability,” said Rowen, who founded Tensilica, now part of Cadence.　　Baker is an example of the delicate balance of skills that CEOs need, said Rowen. “You have to be confident enough to jump out of the airplane, but still ready to take help from any and everyone you meet on the way to Earth — it’s an unusual combination.”　　Cloud-based board design is still plagued by worries about the security of intellectual property and a lack of interoperable tools. Thus, today’s design environment is a hybrid of mainly secured proprietary tools on a local server or desktop with some services like SnapEDA in the cloud.　　“A lot of cloud tools have been launched for sharing, but people didn’t want to switch or couldn’t,” said Baker. “For the short term, its content online and design offline, but price and availability should drive more work to the cloud.”　　The top EDA companies have made their chip design tools available as cloud services but so far seen little traction for them, said Wally Rhines, chief executive of Mentor Graphics. Security concerns have eased since EDA vendors and web giants such as Amazon are now hosting the design services, but the biggest chip designers maintain their own server farms and prefer keeping designs inside the firewall.　　A representative of Amazon said that the web giant is seeing an increase in online design, citing work with NXP. Rhines said that board design is typically less compute-intensive, noting that Digi-Key offers online board design tools.　　In this environment, SnapEDA has been eking out a business since 2013 as an adjunct providing vendor-neutral symbols, footprints, and other design elements. It now provides more than 2 million models in nine formats, with plug-ins for tools such as Altium, Eagle, and PCB123 serving an estimated 5,000 active designs a week.　　Baker sees potential for another funding round to fuel growth in the number and variety of models that SnapEDA supplies, such as 3D, thermal, signal integrity, and functional simulation models.　　“Today, engineers are finding dubious content or they make it themselves or they are just not simulating if they can’t find models — we look at ourselves as a content company serving them; we’re almost like a media company that’s very, very technical,” she said.　　Baker said that she has not directly experienced gender discrimination. She adopts an approach of focusing on the work rather than the gender of people doing it.　　Less than 10% of her EE graduation class was female. Now about half of the employees in her 10-person startup are women — “not because I wanted to keep things equal; I just hired the best people for the job,” she said.　　Overall, “I think we need more women in tech … the way to get there is to do cool tech things. I hope I can inspire other women just by doing it.”　　Y Combinator has been making a conscious effort to fund startups with female founders. A search capability on its website shows that it funded more than 40 women-led startups last year, up from a handful just a few years ago. Its biggest success to date, Ginko Bioworks, is worth more than a billion dollars based on its Series D funding, said Caldwell.　　Like Baker, Owen of Angels By The Bay said that there weren’t many women in her EE graduating class in Wisconsin or at her first big job in 1976 at Intel.　　“With the rise of computer science, I suspect that it’s growing,” said Owen. “Intel was a good company for women even though it didn’t have many at that time. Its approach of management by objectives lets everyone be viewed openly.”　　“At the time, it was like most women didn’t want to be in engineering,” she recalled. “I don’t know why there is a stigma, but it’s about more than women; it’s Americans in general — maybe it’s because the math is seen as hard … even when I was hiring, we had to go out of the country to hire engineers because we aren’t producing enough of them.”　　Silicon Valley is clearly not immune to gender discrimination, as controversies at Google and the case of Ellen Pao at Kleiner Perkins have shown. The good news, said Owen, is that engineers tend to focus on “differentiation based on skills.”

Key word：

EDA

Release time：2018-02-01 00:00 reading：1280 Continue reading>>

model	brand	Quote
MC33074DR2G	onsemi
BD71847AMWV-E2	ROHM Semiconductor
CDZVT2R20B	ROHM Semiconductor
RB751G-40T2R	ROHM Semiconductor
TL431ACLPR	Texas Instruments

model	brand	To snap up
STM32F429IGT6	STMicroelectronics
TPS63050YFFR	Texas Instruments
IPZ40N04S5L4R8ATMA1	Infineon Technologies
BU33JA2MNVX-CTL	ROHM Semiconductor
BP3621	ROHM Semiconductor
ESR03EZPJ151	ROHM Semiconductor

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